R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 630

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 17 Flash Memory (0.18-(m F-ZTAT Version)
(c)
FPFR indicates the return value of the erasure result.
Rev. 3.00 Mar. 14, 2006 Page 592 of 804
REJ09B0104-0300
Bit
7
6
5
Bit
Bit Name
Erasure
Bit Name
MD
EE
7
Initial
Value
MD
6
R/W
R/W
R/W
EE
5
Description
Unused
Returns 0.
Erasure Mode Related Setting Error Detect
Detects the error protection state and returns the result.
When the error protection state is entered, this bit is set
to 1. Whether the error protection state is entered or not
can be confirmed with the FLER bit in FCCS. For
conditions to enter the error protection state, see section
17.9.3, Error Protection.
0: Normal operation (FLER = 0)
1: Error protection state, and programming cannot be
Erasure Execution Error Detect
Returns 1 when the user MAT could not be erased or
when the flash memory related register settings are
partially changed. If this bit is set to 1, there is a high
possibility that the user MAT has been erased partially.
In this case, after removing the error factor, erase the
user MAT. If FMATS is set to H'AA and the user boot
MAT is selected, an error occurs when erasure is
performed. In this case, both the user MAT and user
boot MAT have not been erased. Erasing of the user
boot MAT should be performed in boot mode or
programmer mode.
0: Erasure has ended normally
1: Erasure has ended abnormally
performed (FLER = 1)
FK
4
EB
3
2
1
SF
0

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