R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 78

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2 CPU
[Legend]
d:
S:
D:
SD:
S/D:
S:4:
Notes: 1. Only @aa:16 is available.
Rev. 3.00 Mar. 14, 2006 Page 40 of 804
REJ09B0104-0300
Classifi-
cation
Bit
manipu-
lation
Branch
System
control
d:16 or d:32
Can be specified as a source operand.
Can be specified as a destination operand.
Can be specified as either a source or destination operand or both.
Can be specified as either a source or destination operand.
4-bit immediate data can be specified as a source operand.
2. @ERn+ as a source operand and @−ERn as a destination operand
3. Specified by ER5 as a source address and ER6 as a destination address for data
4. Size of data to be added with a displacement
5. Only @ERn− is available
6. When the number of bits to be shifted is 1, 2, 4, 8, or 16
7. When the number of bits to be shifted is specified by 5-bit immediate data or a general
8. Size of data to specify a branch condition
9. Byte when immediate or register direct, otherwise, word
10. Only @ERn+ is available
11. Only @−ERn is available
12. Not available in this LSI.
Instruction
BFLD
BFST
BRA/BS,
BRA/BC*
BSR/BS,
BSR/BC*
LDC (CCR, EXR)
LDC (VBR, SBR)
STC (CCR, EXR)
STC (VBR, SBR)
ANDC, ORC,
XORC
SLEEP
NOP
transfer.
register
8
8
Size
B
B
B
B
L
L
B


B/W*
B/W*
9
9
#xx
S
S
Rn
D
S
S
S
D
D
@ERn
S
D
S
S
S
D
@(d,ERn)
S
D
Addressing Mode
@(d,
RnL.B/
Rn.W/
ERn.L)
@−ERn/
@ERn+/
@ERn−/
@+ERn
S*
D*
10
11
@aa:8
S
D
S
S
@aa:16/
@aa:32
S
D
S
S
S
D

O
O