R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 369

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
(2)
A compare match signal is generated in the final state in which TCNT and TGR match (the point
at which the count value matched by TCNT is updated). When a compare match signal is
generated, the output value set in TIOR is output at the output compare output pin (TIOC pin).
After a match between TCNT and TGR, the compare match signal is not generated until the
TCNT input clock is generated.
Figure 9.33 shows output compare output timing.
(3)
Figure 9.34 shows input capture signal timing.
Output Compare Output Timing
Input Capture Signal Timing
P
TCNT input
clock
TCNT
TGR
Compare match
signal
TIOC pin
P
Input capture
input
Input capture
signal
TCNT
TGR
Figure 9.34 Input Capture Input Signal Timing
Figure 9.33 Output Compare Output Timing
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Rev. 3.00 Mar. 14, 2006 Page 331 of 804
Section 9 16-Bit Timer Pulse Unit (TPU)
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REJ09B0104-0300

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