R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 632

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 17 Flash Memory (0.18-(m F-ZTAT Version)
(3)
FPEFEQ sets the operating frequency of the CPU. The CPU operating frequency available in this
LSI ranges from 8 MHz to 40 MHz.
Rev. 3.00 Mar. 14, 2006 Page 594 of 804
REJ09B0104-0300
Bit
31 to 16 
15 to 0
Bit
Bit Name
Bit
Bit Name
Bit
Bit Name
Bit
Bit Name
Flash Program/Erase Frequency Parameter (FPEFEQ: General Register ER0 of CPU)
Bit Name
F15 to F0 
F15
F7
31
23
15
—
—
7
Initial
Value

F14
30
22
14
F6
—
—
6
R/W

R/W
F13
F5
29
21
13
—
—
5
Description
Unused
These bits should be cleared to 0.
Frequency Set
These bits set the operating frequency of the CPU.
When the PLL multiplication function is used, set the
multiplied frequency. The setting value must be
calculated as follows:
1. The operating frequency shown in MHz units must
2. The value multiplied by 100 is converted to the
For example, when the operating frequency of the CPU
is 33.000 MHz, the value is as follows:
1. The number of three decimal places of 33.000 is
2. The formula of 33.00 × 100 = 3300 is converted to
be rounded in a number of three decimal places and
be shown in a number of two decimal places.
binary digit and is written to FPEFEQ (general
register ER0).
rounded.
the binary digit and B'0000 1100 1110 0100
(H'0CE4) is set to ER0.
F12
28
20
12
F4
—
—
4
F11
F3
27
—
19
—
11
3
F10
26
18
10
F2
—
—
2
25
17
F9
F1
—
—
9
1
F8
F0
24
16
—
—
8
0