R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 552

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 14 Synchronous Serial Communication Unit (SSU)
14.3.1
SSCRH specifies master/slave device selection, bidirectional mode enable, SSO pin output value
selection, SSCK pin selection, and SCS pin selection.
Rev. 3.00 Mar. 14, 2006 Page 514 of 804
REJ09B0104-0300
Bit
7
6
5
Bit
Bit Name
Initial Value
R/W
Bit Name
MSS
BIDE
SS Control Register H (SSCRH)
MSS
R/W
7
0
Initial
Value
0
0
0
BIDE
R/W
6
0
R/W
R/W
R/W
R/W
R/W
5
0
Bidirectional Mode Enable
Description
Master/Slave Device Select
Selects that this module is used in master mode or
slave mode. When master mode is selected, transfer
clocks are output from the SSCK pin. When the CE bit
in SSSR is set, this bit is automatically cleared.
0: Slave mode is selected.
1: Master mode is selected.
Selects that both serial data input pin and output pin are
used or one of them is used. However, transmission
and reception are not performed simultaneously when
bidirectional mode is selected. For details, section
14.4.3, Relationship between Data Input/Output Pins
and Shift Register.
0: Standard mode (two pins are used for data input and
1: Bidirectional mode (one pin is used for data input and
Reserved
This bit is always read as 0. The write value should
always be 0.
output)
output)
SOL
R/W
4
0
SOLP
R/W
3
1
SCKS
R/W
2
0
CSS1
R/W
1
0
CSS0
R/W
0
0

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