R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 69

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Bit
5
4
3
2
1
0
Bit Name
H
U
N
Z
V
C
Initial
Value
Undefined R/W
Undefined R/W
Undefined R/W
Undefined R/W
Undefined R/W
Undefined R/W
R/W
Description
Half-Carry Flag
When the ADD.B, ADDX.B, SUB.B, SUBX.B, CMP.B, or
NEG.B instruction is executed, this flag is set to 1 if
there is a carry or borrow at bit 3, and cleared to 0
otherwise. When the ADD.W, SUB.W, CMP.W, or
NEG.W instruction is executed, this flag is set to 1 if
there is a carry or borrow at bit 11, and cleared to 0
otherwise. When the ADD.L, SUB.L, CMP.L, or NEG.L
instruction is executed, this flag is set to 1 if there is a
carry or borrow at bit 27, and cleared to 0 otherwise.
User Bit
Can be written to and read from by software using the
LDC, STC, ANDC, ORC, and XORC instructions.
Negative Flag
Stores the value of the most significant bit (regarded as
sign bit) of data.
Zero Flag
Set to 1 to indicate zero data, and cleared to 0 to
indicate non-zero data.
Overflow Flag
Set to 1 when an arithmetic overflow occurs, and
cleared to 0 otherwise.
Carry Flag
Set to 1 when a carry occurs, and cleared to 0
otherwise. A carry has the following types:
The carry flag is also used as a bit accumulator by bit
manipulation instructions.
Carry from the result of addition
Borrow from the result of subtraction
Carry from the result of shift or rotation
Rev. 3.00 Mar. 14, 2006 Page 31 of 804
REJ09B0104-0300
Section 2 CPU

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