R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 178

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 DMA Controller (DMAC)
7.2.4
DTCR is a 32-bit readable/writable register that specifies the size of data to be transferred (total
transfer size).
To transfer 1-byte data in total, set H'00000001 in DTCR. When H'00000000 is set in this register,
it means that the total transfer size is not specified and data is transferred with the transfer counter
stopped (free running mode). When H'FFFFFFFF is set, the total transfer size is 4 Gbytes
(4,294,967,295), which is the maximum size. While data is being transferred, this register
indicates the remaining transfer size. The value corresponding to its data access size is subtracted
every time data is transferred (byte: −1, word: −2, and longword: −4).
Although DTCR can always be read from by the CPU, it must be read from in longwords and
must not be written to while data for the channel is being transferred.
Rev. 3.00 Mar. 14, 2006 Page 140 of 804
REJ09B0104-0300
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
DMA Transfer Count Register (DTCR)
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
R/W
R/W
R/W
R/W
24
16
0
0
8
0
0
0