R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 333

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Note:
Bit
0
*
Bit Name
TGFA
Only 0 can be written to clear the flag.
Initial
value
0
R/W
R/(W)* Input Capture/Output Compare Flag A
Description
Status flag that indicates the occurrence of TGRA input
capture or compare match.
[Setting conditions]
[Clearing conditions]
When TCNT = TGRA while TGRA is functioning as
output compare register
When TCNT value is transferred to TGRA by input
capture signal while TGRA is functioning as input
capture register
When DMAC is activated by a TGIA interrupt while
the DTA bit in DMDR of DMAC is 1
When 0 is written to TGFA after reading TGFA = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
Rev. 3.00 Mar. 14, 2006 Page 295 of 804
Section 9 16-Bit Timer Pulse Unit (TPU)
REJ09B0104-0300

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