R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 403

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

10.4.8
Pulse output can be triggered by TPU input capture as well as by compare match. If TGRA
functions as an input capture register in the TPU channel selected by PCR, pulse output will be
triggered by the input capture signal.
Figure 10.11 shows the timing of this output.
10.5
10.5.1
PPG operation can be disabled or enabled using the module stop control register. The initial value
is for PPG operation to be halted. Register access is enabled by clearing module stop mode. For
details, refer to section 19, Power-Down Modes.
10.5.2
Pins PO0 to PO8 are also used for other peripheral functions such as the TPU. When output by
another peripheral function is enabled, the corresponding pins cannot be used for pulse output.
Note, however, that data transfer from NDR bits to PODR bits takes place, regardless of the usage
of the pins.
Pin functions should be changed only under conditions in which the output trigger event will not
occur.
Pulse Output Triggered by Input Capture
Usage Notes
Module Stop Mode Setting
Operation of Pulse Output Pins
TIOC pin
Input capture
signal
NDR
PODR
PO
P
Figure 10.11 Pulse Output Triggered by Input Capture (Example)
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M
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Section 10 Programmable Pulse Generator (PPG)
Rev. 3.00 Mar. 14, 2006 Page 365 of 804
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REJ09B0104-0300