R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 390

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 Programmable Pulse Generator (PPG)
• NDRL
Rev. 3.00 Mar. 14, 2006 Page 352 of 804
REJ09B0104-0300
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3 to 0
Bit
7 to 4
3
2
1
0
If pulse output groups 0 and 1 have the same output trigger, all eight bits are mapped to the
same address and can be accessed at one time, as shown below.
If pulse output groups 0 and 1 have different output triggers, the upper four bits and lower four
bits are mapped to different addresses as shown below.
Bit Name
NDR7
NDR6
NDR5
NDR4
NDR3
NDR2
NDR1
NDR0
Bit Name
NDR7
NDR6
NDR5
NDR4

Bit Name

NDR3
NDR2
NDR1
NDR0
Initial
Value
0
0
0
0
0
0
0
0
Initial
Value
0
0
0
0
All 1
Initial
Value
All 1
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R
R/W
R/W
R/W
R/W
Description
Next Data Register 7 to 0
The register contents are transferred to the
corresponding PODRL bits by the output trigger specified
with PCR.
Description
Next Data Register 7 to 4
The register contents are transferred to the
corresponding PODRL bits by the output trigger specified
with PCR.
Reserved
These are read-only bits and cannot be modified.
Description
Reserved
These are read-only bits and cannot be modified.
Next Data Register 3 to 0
The register contents are transferred to the
corresponding PODRL bits by the output trigger specified
with PCR.