R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 187

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Bit
7
6
5
4, 3
Bit Name
DTF1
DTF0
DTA
Initial
Value
0
0
0
All 0
R/W
R/W
R/W
R/W
R
Description
Data Transfer Factor 1 and 0
Select a DMAC activation source. When the on-chip
peripheral module setting is selected, the interrupt
source should be selected by DMRSR. When the
external request setting is selected, the sampling
method should be selected by the DREQS bit.
00: Auto request (cycle stealing)
01: Auto request (burst access)
10: On-chip module interrupt
11: External request
Data Transfer Acknowledge
This bit is valid while the DMA transfer is performed by
the on-chip module interrupt. This bit decides whether
the source flag selected by DMRSR is cleared or not.
0: The source flag is not cleared while the DMA transfer
1: The source flag is cleared while the DMA transfer is
Reserved
These are read-only bits and cannot be modified.
performed by the on-chip module interrupt. Since the
source flag is cleared by the DMA transfer, there is
no need to request an interrupt to the CPU.
is performed by the on-chip module interrupt. Since
the source flag is not cleared by the DMA transfer, it
should be cleared by the CPU.
Rev. 3.00 Mar. 14, 2006 Page 149 of 804
Section 7 DMA Controller (DMAC)
REJ09B0104-0300

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