R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 376

no-image

R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 9 16-Bit Timer Pulse Unit (TPU)
9.9.3
When counter clearing by compare match is set, TCNT is cleared in the final state in which it
matches the TGR value (the point at which the count value matched by TCNT is updated).
Consequently, the actual counter frequency is given by the following formula:
9.9.4
If the counter clearing signal is generated in the T2 state of a TCNT write cycle, TCNT clearing
takes precedence and the TCNT write is not performed. Figure 9.47 shows the timing in this case.
Rev. 3.00 Mar. 14, 2006 Page 338 of 804
REJ09B0104-0300
f
f:
P :
N:
Caution on Cycle Setting
Conflict between TCNT Write and Clear Operations
Counter frequency
Operating frequency
TGR set value
(N
Figure 9.47 Conflict between TCNT Write and Clear Operations
P
Address
Write
Counter clear
signal
TCNT
P
1)
TCNT write cycle
T1
N
address
TCNT
T2
H'0000

Related parts for R5F61525