R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 666

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 17 Flash Memory (0.18-(m F-ZTAT Version)
1. After tuning program data is completed, clear the RAMS bit in RAMER to 0 to cancel the
2. Transfer the user-created procedure program to the on-chip RAM.
3. Start the procedure program and download the on-chip program to the on-chip RAM. The start
4. When block EB0 of the user MAT has not been erased, the programming program must be
Note: Setting the RAMS bit to 1 makes all the blocks of the user MAT enter the
Rev. 3.00 Mar. 14, 2006 Page 628 of 804
REJ09B0104-0300
H'00000
H'01000
H'02000
H'03000
H'04000
H'05000
H'06000
H'07000
H'08000
H'3FFFF
overlaid RAM.
address of the download destination should be specified by FTDAR so that the tuned data area
does not overlay the download area.
downloaded after block EB0 is erased. Specify the tuned data saved in the FMPAR and
FMPDR parameters and then execute programming.
programming/erasing protection state (emulation protection state) regardless of the setting
of the RAM2 to RAM0 bits. Under this condition, the on-chip program cannot be
downloaded. When data is to be actually programmed and erased, clear the RAMS bit
to 0.
Flash memory
EB8 to EB11
user MAT
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
Figure 17.19 Programming Tuned Data
(1) Exit RAM emulation mode.
(2) Transfer user-created programming/erasing procedure program.
(3) Download the on-chip programming/erasing program to the area
(4) Program after erasing, if necessary.
specified by FTDAR. FTDAR setting should avoid the tuned data area.
Area for programming/
Tuned data area
erasing program etc.
Download area
Specified by FTDAR
H'FFA000
H'FFAFFF
H'FFB000
H'FFBFFF