R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 476

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 12 Serial Communication Interface (SCI)
12.7.8
Clock output can be fixed using the CKE1 and CKE0 bits in SCR when the GM bit in SMR is set
to 1. Specifically, the minimum width of a clock pulse can be specified.
Figure 12.31 shows an example of clock output fixing timing when the CKE0 bit is controlled
with GM = 1 and CKE1 = 0.
Rev. 3.00 Mar. 14, 2006 Page 438 of 804
REJ09B0104-0300
CKE0
SCK
Clock Output Control
No
No
Figure 12.30 Sample Reception Flowchart
Figure 12.31 Clock Output Fixing Timing
clear RDRF flag in SSR to 0
Given pulse width
Read data from RDR and
Clear RE bit in SCR to 0
All data received?
Start reception
and PER = 0?
Initialization
ORER = 0
RDRF = 1?
Start
Yes
Yes
Yes
No
Error processing
Given pulse width