R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 831

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Item
(3) Erasing Procedure in User
Program Mode
Figure 17.12 Erasing Procedure in
User Program Mode
(4) Procedure of Erasing,
Programming, and RAM
Emulation in User Program Mode
610
611
613
Page Revision (See Manual for Details)
Amended
Amended
3. Erasure is executed. As in programming, the entry
Amended
point of the erasing program is at the address which
is 16 bytes after #DLTOP (start address of the
download destination specified by FTDAR). Call the
subroutine to execute erasure by using the following
steps.
 The general registers other than ER0 and ER1
Be sure to initialize both the programming program
and erasing program. When the FPEFEQ
parameter is initialized, also initialize both the
erasing program and programming program.
Initialization must be executed for both entry
addresses: 32 bytes after #DLTOP (start address of
download destination for erasing program), and 32
bytes after #DLTOP (start address of download
destination for programming program).
are held in the erasing program.
No
JSR FTDAR setting
Disable interrupts and
Rev. 3.00 Mar. 14, 2006 Page 793 of 804
bus master operation
Set FEBS parameter
procedure program
Clear FKEY to 0
Set FKEY to H'5A
other than CPU
Required block
FPFR
End erasing
completed?
erasing is
Erasing
1
Yes
Yes
0?
Clear FKEY and erasing
16
error processing
No
2.
3.
4.
5.
6.
REJ09B0104-0300

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