R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 704

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 18 Clock Pulse Generator
Table 18.2 Crystal Resonator Characteristics
18.2.2
An external clock signal can be input as shown in the examples in figure 18.4. If the XTAL pin is
left open, make sure that parasitic capacitance is no more than 10 pF. When the counter clock is
input to the XTAL pin, make sure that the external clock is held high in standby mode.
For the input conditions of the external clock, refer to table 21.4, Clock Timing, in section 21.3.1,
Clock Timing. The input external clock should be from 4 to 9 MHz.
18.3
The PLL circuit has the function of multiplying the frequency of the clock from the oscillator by a
factor of 8. The frequency multiplication factor is fixed.
18.4
The frequency divider divides the PLL clock to generate a 1/2, 1/4, or 1/8 clock. After bits ICK2
to ICK0 and PCK 2 to PCK0 are modified, this LSI operates at the modified frequency.
Rev. 3.00 Mar. 14, 2006 Page 666 of 804
REJ09B0104-0300
Frequency (MHz)
R
C
S
0
Max. (pF)
Max. (Ω)
External Clock Input
PLL Circuit
Frequency Divider
Figure 18.4 External Clock Input (Examples)
EXTAL
EXTAL
XTAL
XTAL
4
120
7
(b) Counter clock input on XTAL pin
(a) XTAL pin left open
6
100
7
Open
External clock input
External clock input
8
80
7
9
80
7

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