MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 95

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

3.5.2.1 Number of masters
The Flash Memory Controller supports up to eight crossbar switch masters. However,
this device has a different number of crossbar switch masters. See
Configuration
3.5.2.2 Program Flash Swap
On devices that contain program flash memory only, the program flash memory blocks
may swap their base addresses.
While not using swap:
If swap is used, the opposite is true:
3.5.3 SRAM Configuration
This section summarizes how the module has been configured in the chip.
Freescale Semiconductor, Inc.
System memory map
• FMC_PFB0CR controls the lower code addresses (block 0)
• FMC_PFB1CR controls the upper code addresses (block 1)
• FMC_PFB0CR controls the upper code addresses (now in block 0)
• FMC_PFB1CR controls the lower code addresses (now in block 1)
Full description
Transfers
Clocking
Topic
Cortex-M4
Crossbar
switch
for details on the master port assignments.
core
Memory protection unit
ARM Cortex-M4 core
Table 3-37. Reference links to related information
SRAM controller
Related module
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
SRAM
MPU
MPU
Figure 3-23. SRAM configuration
Transfers
Memory protection unit
System memory map
ARM Cortex-M4 core
Clock Distribution
SRAM controller
SRAM upper
SRAM lower
Reference
SRAM
Crossbar Switch
Chapter 3 Chip Configuration
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