MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 113
MK30DN512ZVLK10
Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet
1.MK30DN512ZVLK10.pdf
(1547 pages)
Specifications of MK30DN512ZVLK10
Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT
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3.7.3.3 12-bit DAC Reference
For this device VREF_OUT and VDDA are selectable as the DAC reference.
VREF_OUT is connected to the DACREF_1 input and VDDA is connected to the
DACREF_2 input. Use DACx_C0[DACRFS] control bit to select between these two
options.
Be aware that if the DAC and ADC use the VREF_OUT reference simultaneously, some
degradation of ADC accuracy is to be expected due to DAC switching.
3.7.4 VREF Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
3.7.4.1 VREF Overview
This device includes a voltage reference (VREF) to supply an accurate 1.2 V voltage
output.
Freescale Semiconductor, Inc.
System memory map
Power management
Signal multiplexing
Full description
Clocking
Topic
Other peripherals
Table 3-47. Reference links to related information
Related module
Port control
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
VREF
Figure 3-37. VREF configuration
Transfers
Peripheral bus
controller 0
VREF
Register
access
System memory map
Power management
Signal multiplexing
Clock distribution
Module signals
Reference
VREF
Chapter 3 Chip Configuration
113
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