MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 870

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Part Number:
MK30DN512ZVLK10
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Functional Description
loading points if CNTMAX = 1 or CNTMIN = 1
CNT = MOD -> CNTIN
up counting mode
loading points if CNTMAX = 1
CNT = (MOD - 0x0001) -> MOD
up-down counting mode
CNT = (CNTIN + 0x0001) -> CNTIN
loading points if CNTMIN = 1
Figure 36-207. Boundary Cycles and Loading Points
36.4.11.4 MOD Register Synchronization
The MOD register synchronization updates the MOD register with its buffer value. This
synchronization is enabled if (FTMEN = 1).
The MOD register synchronization can be done by either the enhanced PWM
synchronization (SYNCMODE = 1) or the legacy PWM synchronization (SYNCMODE
= 0). However, it is expected that the MOD register be synchronized only by the
enhanced PWM synchronization.
In the case of enhanced PWM synchronization, the MOD register synchronization
depends on SWWRBUF, SWRSTCNT, HWWRBUF and HWRSTCNT bits according to
this flowchart:
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
870
Freescale Semiconductor, Inc.

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