MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 596

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Memory Map and Registers
Address: FTFL_FSTAT is 4002_0000h base + 0h offset = 4002_0000h
596
RDCOLERR
ACCERR
FPVIOL
CCIF
Reset
Field
Read
Write
7
6
5
4
Bit
When set, the Access Error (ACCERR) and Flash Protection
Violation (FPVIOL) bits in this register prevent the launch of
any more commands until the flag is cleared (by writing a one
to it).
CCIF
w1c
Command Complete Interrupt Flag
The CCIF flag indicates that a FTFL command has completed. The CCIF flag is cleared by writing a 1 to
CCIF to launch a command, and CCIF stays low until command completion or command violation.
The CCIF bit is reset to 0 but is set to 1 by the memory controller at the end of the reset initialization
sequence. Depending on how quickly the read occurs after reset release, the user may or may not see
the 0 hardware reset value.
0
1
FTFL Read Collision Error Flag
The RDCOLERR error bit indicates that the MCU attempted a read from an FTFL resource that was being
manipulated by an FTFL command (CCIF=0). Any simultaneous access is detected as a collision error by
the block arbitration logic. The read data in this case cannot be guaranteed. The RDCOLERR bit is
cleared by writing a 1 to it. Writing a 0 to RDCOLERR has no effect.
0
1
Flash Access Error Flag
The ACCERR error bit indicates an illegal access has occurred to an FTFL resource caused by a violation
of the command write sequence or issuing an illegal FTFL command. While ACCERR is set, the CCIF
flag cannot be cleared to launch a command. The ACCERR bit is cleared by writing a 1 to it. Writing a 0 to
the ACCERR bit has no effect.
0
1
Flash Protection Violation Flag
The FPVIOL error bit indicates an attempt was made to program or erase an address in a protected area
of program flash memory during a command write sequence . While FPVIOL is set, the CCIF flag cannot
be cleared to launch a command. The FPVIOL bit is cleared by writing a 1 to it. Writing a 0 to the FPVIOL
bit has no effect.
0
1
7
0
FTFL command in progress
FTFL command has completed
No collision error detected
Collision error detected
No access error detected
Access error detected
No protection violation detected
Protection violation detected
RDCOLERR
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
w1c
0
6
FTFL_FSTAT field descriptions
ACCERR
Table continues on the next page...
w1c
0
5
NOTE
FPVIOL
w1c
0
4
Description
0
3
0
0
2
Freescale Semiconductor, Inc.
0
1
MGSTAT0
0
0

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