MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1186

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory map and registers
44.3.18 UART FIFO Status Register (UARTx_SFIFO)
This register provides various status information regarding the transmit and receiver
buffers/FIFOs, including interrupt information. This register may be written or read at
anytime.
Addresses: UART0_SFIFO is 4006_A000h base + 12h offset = 4006_A012h
1186
RXFLUSH
TXFLUSH
Reserved
RXUFE
TXOFE
Field
Reset
5–2
Read
Write
7
6
1
0
Bit
UART1_SFIFO is 4006_B000h base + 12h offset = 4006_B012h
UART2_SFIFO is 4006_C000h base + 12h offset = 4006_C012h
UART3_SFIFO is 4006_D000h base + 12h offset = 4006_D012h
TXEMPT
Transmit FIFO/Buffer Flush
Writing to this bit causes all data that is stored in the transmit FIFO/buffer to be flushed. This does not
affect data that is in the transmit shift register.
0
1
Receive FIFO/Buffer Flush
Writing to this bit causes all data that is stored in the receive FIFO/buffer to be flushed. This does not
affect data that is in the receive shift register.
0
1
This read-only field is reserved and always has the value zero.
Transmit FIFO Overflow Interrupt Enable
When this bit is set the TXOF flag will generate an interrupt to the host.
0
1
Receive FIFO Underflow Interrupt Enable
When this bit is set the RXUF flag will generate an interrupt to the host.
0
1
7
1
No flush operation occurs.
All data in the transmit FIFO/Buffer is cleared out.
No flush operation occurs.
All data in the receive FIFO/buffer is cleared out.
TXOF flag does not generate an interrupt to the host.
TXOF flag generates an interrupt to the host.
RXUF flag does not generate an interrupt to the host.
RXUF flag generates an interrupt to the host.
RXEMPT
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
1
6
UARTx_CFIFO field descriptions
0
5
0
4
Description
0
0
3
0
2
Freescale Semiconductor, Inc.
TXOF
0
1
RXUF
0
0