MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 238

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
Memory map and register definition
11.4.5 Digital Filter Enable Register (PORTx_DFER)
Addresses: PORTA_DFER is 4004_9000h base + C0h offset = 4004_90C0h
238
Bit
W
R
31
0
31–0
31–0
Field
Field
DFE
ISF
30
0
PORTB_DFER is 4004_A000h base + C0h offset = 4004_A0C0h
PORTC_DFER is 4004_B000h base + C0h offset = 4004_B0C0h
PORTD_DFER is 4004_C000h base + C0h offset = 4004_C0C0h
PORTE_DFER is 4004_D000h base + C0h offset = 4004_D0C0h
29
0
28
0
Interrupt Status Flag
Each bit in the field indicates the detection of the configured interrupt of the same number as the bit.
0
1
Digital Filter Enable
The digital filter configuration is valid in all digital pin muxing modes. The output of each digital filter is
reset to zero at system reset and whenever the digital filter is disabled.
0
1
27
0
Configured interrupt has not been detected.
Configured interrupt has been detected. If pin is configured to generate a DMA request then the
corresponding flag will be cleared automatically at the completion of the requested DMA transfer,
otherwise the flag remains set until a logic one is written to the flag. If configured for a level sensitive
interrupt and the pin remains asserted then the flag will set again immediately after it is cleared.
Digital Filter is disabled on the corresponding pin and output of the digital filter is reset to zero.Each
bit in the field enables the digital filter of the same number as the bit.
Digital Filter is enabled on the corresponding pin, provided pin is configured as a digital input.
26
0
25
0
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
23
0
22
0
PORTx_DFER field descriptions
PORTx_ISFR field descriptions
21
0
20
0
19
0
18
0
17
0
16
0
DFE
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
4
0
0
3
0
2
0
1
0
0