MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 771

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Reset
35.3.2 Modulus Register (PDBx_MOD)
Addresses: PDB0_MOD is 4003_6000h base + 4h offset = 4003_6004h
Freescale Semiconductor, Inc.
Bit
W
R
Reserved
31
0
PDBIE
CONT
MULT
LDOK
Field
3–2
30
5
4
1
0
0
29
0
28
0
This bit is set when the counter value is equal to the IDLY register. Writing zero clears this bit.
PDB Interrupt Enable.
This bit enables the PDB interrupt. When this bit is set and DMAEN is cleared, PDBIF generates a PDB
interrupt.
0
1
This read-only field is reserved and always has the value zero.
Multiplication Factor Select for Prescaler
This bit selects the multiplication factor of the prescaler divider for the counter clock.
00
01
10
11
Continuous Mode Enable
This bit enables the PDB operation in Continuous mode.
0
1
Load OK
Writing 1 to this bit updates the internal registers of MOD, IDLY, CHnDLYm, DACINTx, and POyDLY with
the values written to their buffers. The MOD, IDLY, CHnDLYm, DACINTx, and POyDLY will take effect
according to the LDMOD.
After 1 is written to LDOK bit, the values in the buffers of above registers are not effective and the buffers
cannot be written until the values in buffers are loaded into their internal registers.
LDOK can be written only when PDBEN is set or it can be written at the same time with PDBEN being
written to 1. It is automatically cleared when the values in buffers are loaded into the internal registers or
the PDBEN is cleared. Writing 0 to it has no effect.
27
0
PDB interrupt disabled
PDB interrupt enabled
PDB operation in One-Shot mode
PDB operation in Continuous mode
26
0
Multiplication factor is 1
Multiplication factor is 10
Multiplication factor is 20
Multiplication factor is 40
25
0
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
PDBx_SC field descriptions (continued)
23
0
22
0
21
0
20
0
19
0
18
0
17
0
16
0
15
1
Description
14
1
13
1
12
1
Chapter 35 Programmable Delay Block (PDB)
11
1
10
1
1
9
MOD
1
8
1
7
1
6
1
5
4
1
1
3
1
2
1
1
771
1
0

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