MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1328

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Initialization/application of SDHC
45.6.3.3.1 Suspend
After setting the PROCTL[SABGREQ] bit, the host driver may send a suspend command
to switch to another function of the SDIO card. The SDHC does not monitor the content
of the response, so it doesn't know if the suspend command succeeded or not.
Accordingly, it doesn't de-assert read wait for read pause. To solve this problem, the
driver shall not mark the suspend command as a "suspend", (i.e. setting the
XFERTYP[CMDTYP] bits to 01). Instead, the driver shall send this command as if it
were a normal command, and only when the command succeeds, and the BS bit is set in
the response, can the driver send another command marked as "suspend" to inform the
SDHC that the current transfer is suspended. As shown in the following sequence for
suspend operation:
45.6.3.3.2 Resume
To resume the data transfer, a resume command shall be issued:
1328
1. Set the PROCTL[SABGREQ] bit to pause the current data transfer at block gap.
2. After the IRQSTAT[BGE] bit is set, send the suspend command to suspend the
3. Check the BS bit of the CCCR in the response. If it is 1, repeat this step until the BS
4. Send another normal I/O command to the suspended function. The
5. Save the context registers in the system memory for later use, including the DMA
6. Begin operation for another function on the SDIO card.
1. To resume the suspended function, restore the context register with the saved value
2. Send the resume command. In the transfer type register, all bit fields are set to the
3. If the resume command has responded, the data transfer will be resumed.
active function. The XFERTYP[CMDTYP] bit field must be 2'b00.
bit is cleared or abandon the suspend operation according to the Driver strategy.
XFERTYP[CMDTYP] of this command must be 2'b01, so the SDHC can detect this
special setting and be informed that the paused operation has successfully suspended.
If the paused transfer is a read operation, the SDHC stops driving DAT2 and goes to
the idle state.
system address register (for internal DMA operation), and the block attribute register.
in step #5 of the suspend operation above.
value as if this were another ordinary data transfer, instead of a transfer resume
(except the CMDTYP is set to 2'b10).
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.