MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 673

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor, Inc.
Reserved
REFSEL
ADTRG
ACREN
DMAEN
ADACT
ACFGT
ACFE
31–8
Field
1–0
7
6
5
4
3
2
This read-only field is reserved and always has the value zero.
Conversion active
ADACT indicates that a conversion or hardware averaging is in progress. ADACT is set when a
conversion is initiated and cleared when a conversion is completed or aborted.
0
1
Conversion trigger select
ADTRG selects the type of trigger used for initiating a conversion. Two types of trigger are selectable:
software trigger and hardware trigger. When software trigger is selected, a conversion is initiated following
a write to SC1A. When hardware trigger is selected, a conversion is initiated following the assertion of the
ADHWT input after a pulse of the ADHWTSn input.
0
1
Compare function enable
ACFE enables the compare function.
0
1
Compare function greater than enable
ACFGT configures the compare function to check the conversion result relative to the compare value
register(s) (CV1 and CV2) based upon the value of ACREN. The ACFE bit must be set for ACFGT to
have any effect.
0
1
Compare function range enable
ACREN configures the compare function to check if the conversion result of the input being monitored is
either between or outside the range formed by the compare value registers (CV1 and CV2) determined by
the value of ACFGT. The ACFE bit must be set for ACFGT to have any effect.
0
1
DMA enable
0
1
Voltage reference selection
REFSEL bits select the voltage reference source used for conversions.
Conversion not in progress.
Conversion in progress.
Software trigger selected.
Hardware trigger selected.
Compare function disabled.
Compare function enabled.
Configures less than threshold, outside range not inclusive and inside range not inclusive functionality
based on the values placed in the CV1 and CV2 registers.
Configures greater than or equal to threshold, outside range inclusive and inside range inclusive
functionality based on the values placed in the CV1 and CV2 registers.
Range function disabled. Only the compare value 1 register (CV1) is compared.
Range function enabled. Both compare value registers (CV1 and CV2) are compared.
DMA is disabled.
DMA is enabled and will assert the ADC DMA request during a ADC conversion complete event noted
by the assertion of any of the ADC COCO flags.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
ADCx_SC2 field descriptions
Table continues on the next page...
Description
Chapter 31 Analog-to-Digital Converter (ADC)
673

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