MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 231

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Freescale Semiconductor, Inc.
4004_B05C
4004_B06C
4004_B07C
4004_B0C0
4004_B0C4
4004_B0C8
4004_C00C
4004_C01C
4004_C02C
4004_B050
4004_B054
4004_B058
4004_B060
4004_B064
4004_B068
4004_B070
4004_B074
4004_B078
4004_B080
4004_B084
4004_B0A0
4004_C000
4004_C004
4004_C008
4004_C010
4004_C014
4004_C018
4004_C020
4004_C024
4004_C028
Absolute
address
(hex)
Pin Control Register n (PORTC_PCR20)
Pin Control Register n (PORTC_PCR21)
Pin Control Register n (PORTC_PCR22)
Pin Control Register n (PORTC_PCR23)
Pin Control Register n (PORTC_PCR24)
Pin Control Register n (PORTC_PCR25)
Pin Control Register n (PORTC_PCR26)
Pin Control Register n (PORTC_PCR27)
Pin Control Register n (PORTC_PCR28)
Pin Control Register n (PORTC_PCR29)
Pin Control Register n (PORTC_PCR30)
Pin Control Register n (PORTC_PCR31)
Global Pin Control Low Register (PORTC_GPCLR)
Global Pin Control High Register (PORTC_GPCHR)
Interrupt Status Flag Register (PORTC_ISFR)
Digital Filter Enable Register (PORTC_DFER)
Digital Filter Clock Register (PORTC_DFCR)
Digital Filter Width Register (PORTC_DFWR)
Pin Control Register n (PORTD_PCR0)
Pin Control Register n (PORTD_PCR1)
Pin Control Register n (PORTD_PCR2)
Pin Control Register n (PORTD_PCR3)
Pin Control Register n (PORTD_PCR4)
Pin Control Register n (PORTD_PCR5)
Pin Control Register n (PORTD_PCR6)
Pin Control Register n (PORTD_PCR7)
Pin Control Register n (PORTD_PCR8)
Pin Control Register n (PORTD_PCR9)
Pin Control Register n (PORTD_PCR10)
Pin Control Register n (PORTD_PCR11)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Register name
PORT memory map (continued)
Table continues on the next page...
Chapter 11 Port control and interrupts (PORT)
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
(always
(always
reads
reads
zero)
zero)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
W
W
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
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Section/
page
231