MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1465

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Quantity
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Part Number:
MK30DN512ZVLK10
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Quantity:
10 000
49.2.1 LCD_P[63:0]
When LCD functionality is enabled by the PEN[63:0] bits in the PEN registers, the
corresponding LCD_P[63:0] pin generates a frontplane or backplane waveform
depending on the configuration of the backplane-enable bit field (BPEN[63:0]).
49.2.2 V
V
be internally generated using the internal charge pump (when enabled). When using the
LCD charge pump, CPSEL = 1, a 0.1 µF capacitor should be placed from V
The charge pump can also be configured to accept V
and V
V
49.2.3 V
The charge pump capacitor is used to transfer charge from the input supply to the
regulated output. Use a ceramic capacitor. A 0.1 µF capacitor should be placed between
these two pins.
49.3 Memory map and register definition
The total address for each register is the sum of the base address for the LCD controller
and the address offset for each register.
This section consists of register descriptions. Each description includes a standard
register diagram. Details of register bit and field function follow the register diagrams, in
bit order.
Freescale Semiconductor, Inc.
400B_E000
LL1
DD
Absolute
address
(hex)
. Refer to VSUPPLY[1:0] bits explanation.
, V
LL2
LL2
for 3 V glass operation. V
, and V
LCD general control register (LCD_GCR)
LL1
cap1
, V
, V
LL3
LL2
cap2
are bias voltages for the LCD controller driver waveforms that can
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
, V
LL3
Register name
Table continues on the next page...
LCD memory map
LL3
should never be connected to a voltage other than
LL3
(in bits)
Width
as an input and generate V
32
Access
Chapter 49 LCD Controller (SLCD)
R/W
Reset value
0835_0003h
LLx
to ground.
Section/
49.3.1/
LL1
page
1467
1465

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