MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1303

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
For ADMA2, including the following descriptors:
ADMA2 deals with the lower 32-bit first, and then the higher 32-bit. If the 'Valid' flag of
descriptor is 0, it will ignore the high 32-bit. Address field shall be set on word
aligned(lower 2-bit is always set to 0). Data length is in byte unit.
ADMA will start read/write operation after it reaches the tran state, using the data length
and data address analyzed from most recent descriptor(s).
For ADMA1, the valid data length descriptor is the last set type descriptor before tran
type descriptor. Every tran type will trigger a transfer, and the transfer data length is
extracted from the most recent set type descriptor. If there is no set type descriptor after
the previous trans descriptor, the data length will be the value for previous transfer, or 0 if
no set descriptor is ever met.
For ADMA2, tran type descriptor contains both data length and transfer data address, so
only a tran type descriptor can start a data transfer
Freescale Semiconductor, Inc.
Address/page field
31
Address or data length
• Valid/Invalid descriptor.
• Nop descriptor.
• Set data length descriptor.
• Set data address descriptor.
• Link descriptor.
• Interrupt flag and end flag in descriptor.
• Valid/Invalid descriptor.
• Nop descriptor.
• Rsv descriptor.
• Set data length & address descriptor.
• Link descriptor.
• Interrupt flag and end flag in descriptor.
Table 45-35. Format of the ADMA1 descriptor table
12
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Address/page field
11
000000
Table continues on the next page...
6
Act2
5
Chapter 45 Secured digital host controller (SDHC)
Act1
4
Attribute field
3
0
Int
2
End
1
Valid
0
1303

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