MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1358

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory map/register definition
1358
4002_F01C
4002_F02C
4002_F03C
4002_F04C
4002_F018
4002_F020
4002_F024
4002_F028
4002_F038
4002_F040
4002_F044
4002_F048
4002_F050
4002_F054
4002_F058
Absolute
address
(hex)
I2S Interrupt Enable Register (I2S0_IER)
I2S Transmit Configuration Register (I2S0_TCR)
I2S Receive Configuration Register (I2S0_RCR)
I2S Transmit Clock Control Registers (I2S0_TCCR)
I2S Receive Clock Control Registers (I2S0_RCCR)
I2S FIFO Control/Status Register (I2S0_FCSR)
I2S AC97 Control Register (I2S0_ACNT)
I2S AC97 Command Address Register (I2S0_ACADD)
I2S AC97 Command Data Register (I2S0_ACDAT)
I2S AC97 Tag Register (I2S0_ATAG)
I2S Transmit Time Slot Mask Register (I2S0_TMSK)
I2S Receive Time Slot Mask Register (I2S0_RMSK)
I2S AC97 Channel Status Register (I2S0_ACCST)
I2S AC97 Channel Enable Register (I2S0_ACCEN)
I2S AC97 Channel Disable Register (I2S0_ACCDIS)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Register name
I2S memory map (continued)
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
(always
(always
reads
reads
zero)
zero)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
R
Freescale Semiconductor, Inc.
Reset value
0000_3003h
0000_0200h
0000_0200h
0004_0000h
0004_0000h
0081_0081h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
Section/
46.3.10/
46.3.11/
46.3.12/
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46.3.15/
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46.3.17/
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46.3.19/
46.3.20/
46.3.21/
46.3.7/
46.3.8/
46.3.9/
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