MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1438

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory map and register definition
48.6.1 General Control and Status Register (TSIx_GENCS)
All GENCS bits can be read at any time, but must not be written while GENCS[SCNIP]
is set.
Addresses: TSI0_GENCS is 4004_5000h base + 0h offset = 4004_5000h
1438
Reset
Reset
4004_515C
4004_5154
4004_5158
Absolute
address
Bit
Bit
W
W
Reserved
Reserved
(hex)
R
R
LPCLKS
30–29
Field
31
28
w1c
31
15
0
0
Channel n threshold register (TSI0_THRESHLD13)
Channel n threshold register (TSI0_THRESHLD14)
Channel n threshold register (TSI0_THRESHLD15)
w1c
30
14
0
0
Reserved
This field is reserved.
This read-only field is reserved and always has the value zero.
Low Power Mode Clock Source Selection
0
w1c
29
13
0
0
w1c
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
28
12
0
0
Register name
27
11
0
0
TSIx_GENCS field descriptions
TSI memory map (continued)
0
Table continues on the next page...
LPSCNITV
26
10
0
0
25
0
0
9
24
0
0
8
Description
23
0
0
7
22
0
0
6
(in bits)
Width
32
32
32
NSCN
21
0
0
5
Access
R/W
R/W
R/W
20
0
0
4
Freescale Semiconductor, Inc.
Reset value
0000_0000h
0000_0000h
0000_0000h
19
0
0
3
18
0
0
2
PS
17
0
0
1
Section/
48.6.6/
48.6.6/
48.6.6/
page
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1451
1451
16
0
0
0