MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 682

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
Register Definition
31.3.19 ADC minus-side general calibration value register
CLMx contain calibration information that is generated by the calibration function. These
registers contain seven calibration values of varying widths: CLM0[5:0], CLM1[6:0],
CLM2[7:0], CLM3[8:0], CLM4[9:0], CLMS[5:0], and CLMD[5:0]. CLMx are
automatically set once the self calibration sequence is done (CAL is cleared). If these
registers are written by the user after calibration, the linearity error specifications may not
be met.
Addresses: ADC0_CLMD is 4003_B000h base + 54h offset = 4003_B054h
682
Bit
W
R
Reserved
Reserved
31
0
CLMD
15–0
31–6
Field
Field
5–0
30
0
ADC1_CLMD is 400B_B000h base + 54h offset = 400B_B054h
29
0
(ADCx_CLMD)
28
0
1000
1001
1010
1011
1100
1101
1110
1111
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
Calibration value
27
0
26
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
25
0
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
ADCx_PGA field descriptions (continued)
23
0
22
0
ADCx_CLMD field descriptions
21
0
20
0
19
0
0
18
0
17
0
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
4
0
CLMD
1
3
0
2
1
1
0
0