MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 307

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Chapter 15 Low-leakage wake-up unit (LLWU)
15.1.2.2 VLLS modes
The LLWU module provides up to 16 external wakeup inputs and up to seven internal
module wakeup inputs. In addition, a VLLS reset event can be initiated via assertion of
the RESET pin. All wakeup and reset events result in VLLS exit via a reset flow.
15.1.2.3 Non-low leakage modes
The LLWU is not active in all non- LLS and VLLS modes where detection and control
logic are in a static state. The LLWU registers are accessible in non-LLS and VLLS
modes and are available for configuring and reading status when bus transactions are
possible.
When the reset pin filter is enabled, filter operation begins immediately so that if LLS or
VLLS modes are entered while the the filter logic has seen an active edge on the RESET
pin and is currently sensing for minimum assertion duration, there is no restart of pin
filtering as RESET filtering transitions from a non-low leakage filter operation
(implemented external to LLWU) to the RESET pin filter circuit implemented in the
LLWU.
15.1.2.4 Debug mode
In debug mode, when LLS/VLLS modes are entered, the chip enters fully functional
VLLS and LLS modes and no debug logic is working; on exit from LLS/VLLS, the
LLWU becomes inactive and the debug logic becomes active again.
15.1.3 Block diagram
The following figure is the block diagram for the LLWU module.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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