MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1249

Manufacturer Part Number

MK30DN512ZVLK10

ARM Microcontrollers - MCU KINETIS 512K SLCD

Manufacturer

Freescale Semiconductor

ARM Cortex M4

Processor Series

Data Bus Width

Maximum Clock Frequency

Program Memory Size

Data Ram Size

Operating Supply Voltage

1.71 V to 3.6 V

Operating Temperature Range

- 40 C to + 105 C

Package / Case

Mounting Style

Manufacturer

BOSTOCK HK LIMITED

Part Number:

MK30DN512ZVLK10

Manufacturer:

Freescale Semiconductor

45.4.3 Command Argument Register (SDHC_CMDARG)

This register contains the SD/MMC command argument.

Address: SDHC_CMDARG is 400B_1000h base + 8h offset = 400B_1008h

Freescale Semiconductor, Inc.

When restoring transfer content prior to issuing a resume command, the host driver shall restore the

previously saved block count.

NOTE: Although the BLKCNT field is 0 after reset, the read of reset value is 0x1. This is because when

FFFFh 65535 blocks

This read-only field is reserved and always has the value zero.

Transfer Block Size

This register specifies the block size for block data transfers. Values ranging from 1 byte up to the

maximum buffer size can be set. It can be accessed only when no transaction is executing (that is after a

transaction has stopped). Read operations during transfers may return an invalid value, and write

operations will be ignored.

XFERTYP[MSBSEL] bit is 0, indicating a single block transfer, the read value of BLKCNT is

No data transfer

SDHC_BLKATTR field descriptions (continued)

K30 Sub-Family Reference Manual, Rev. 6, Nov 2011

Chapter 45 Secured digital host controller (SDHC)