MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 580

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
Memory map and register descriptions
27.4.8 Cache Data Storage (upper word) (FMC_DATAW0SU)
The cache of 64-bit entries is a 4-way, set-associative cache with 8 sets. The ways are
numbered 0-3 and the sets are numbered 0-7. In DATAWxSyU and DATAWxSyL, x
denotes the way, y denotes the set, and U and L represent upper and lower word,
respectively. This section represents data for the upper word (bits [63:32]) of all 8 sets
(n=0-7) in way 0.
Addresses: FMC_DATAW0S0U is 4001_F000h base + 200h offset = 4001_F200h
580
Bit
W
R
data[63:32]
31
0
31–0
Field
30
0
FMC_DATAW0S1U is 4001_F000h base + 208h offset = 4001_F208h
FMC_DATAW0S2U is 4001_F000h base + 210h offset = 4001_F210h
FMC_DATAW0S3U is 4001_F000h base + 218h offset = 4001_F218h
FMC_DATAW0S4U is 4001_F000h base + 220h offset = 4001_F220h
FMC_DATAW0S5U is 4001_F000h base + 228h offset = 4001_F228h
FMC_DATAW0S6U is 4001_F000h base + 230h offset = 4001_F230h
FMC_DATAW0S7U is 4001_F000h base + 238h offset = 4001_F238h
29
0
28
0
Bits [63:32] of data entry
27
0
26
0
25
0
24
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
23
0
FMC_DATAW0SnU field descriptions
22
0
21
0
20
0
19
0
18
0
17
0
data[63:32]
16
0
15
0
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
4
0
0
3
0
2
0
1
0
0