MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 222

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Module Signal Description Tables
10.4.7 Human-Machine Interfaces (HMI)
222
Chip signal name
Chip signal name
I2S0_RX_BCLK
I2S0_TX_BCLK
I2S0_RX_FS
I2S0_TX_FS
I2S0_MCLK
PTA[31:0]
I2S0_RXD
I2S0_TXD
1
Module signal
Module signal
PORTA[31:0]
SRCK
SRXD
SRFS
STCK
STFS
STXD
name
name
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table 10-27. I
Table 10-28. GPIO Signal Descriptions
Table continues on the next page...
Serial master clock output
Serial receive clock. SRCK can be used as an input or output.
Serial receive frame Sync. The SRFS port can be used as an input
or output. The frame sync is used by the receiver to synchronize
the transfer of data. The frame sync signal can be one bit or one
word in length and can occur one bit before the transfer of data or
right at the transfer of data. If SRFS is configured as an input, the
external device should drive SRFS during the rising edge of STCK
or SRCK.
Serial receive data. The SRXD port is an input and is used to bring
serial data into the receive data shift register.
Serial transmit clock. The STCK port can be used as an input or
output. This clock signal is used by the transmitter and can be
continuous or gated. During gated clock mode, data on STCK is
valid only during the transmission of data. Otherwise, it is pulled to
the inactive state. In synchronous mode, this port is used by the
transmit and receive sections.
Serial transmit frame sync. The STFS port can be used as an input
or output. The frame sync is used by the transmitter to synchronize
the transfer of data. The frame sync signal can be one bit or one
word in length and can occur one bit before the transfer of data or
right at the transfer of data. In synchronous mode, this port is used
by both the transmit and receive sections. In gated clock mode,
frame sync signals are not used. If STFS is configured as an input,
the external device should drive STFS during the rising edge of
STCK if TSCKP is positive-edge triggered. The external device
should drive STFS during the falling edge of STCK if TSCKP is
negative-edge triggered.
Serial transmit data. The STXD port is an output and transmits data
from the serial transmit shift register. The STXD port is an output
port when data is being transmitted and is disabled between data
word transmissions and on the trailing edge of the bit clock after
the last bit of a word is transmitted.
General purpose input/output
Description
Description
• In asynchronous mode the receiver uses this clock signal
• In synchronous mode, the STCK port is used instead for
and it is always continuous.
clocking in data.
2
S 0 Signal Descriptions
Freescale Semiconductor, Inc.
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