MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 239

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Reset
Reset
11.4.6 Digital Filter Clock Register (PORTx_DFCR)
Addresses: PORTA_DFCR is 4004_9000h base + C4h offset = 4004_90C4h
11.4.7 Digital Filter Width Register (PORTx_DFWR)
The digital filter configuration is valid in all digital pin muxing modes.
Addresses: PORTA_DFWR is 4004_9000h base + C8h offset = 4004_90C8h
Freescale Semiconductor, Inc.
Bit
Bit
W
W
R
R
Reserved
31
31
0
0
31–1
Field
CS
30
30
0
0
0
PORTB_DFCR is 4004_A000h base + C4h offset = 4004_A0C4h
PORTC_DFCR is 4004_B000h base + C4h offset = 4004_B0C4h
PORTD_DFCR is 4004_C000h base + C4h offset = 4004_C0C4h
PORTE_DFCR is 4004_D000h base + C4h offset = 4004_D0C4h
PORTB_DFWR is 4004_A000h base + C8h offset = 4004_A0C8h
PORTC_DFWR is 4004_B000h base + C8h offset = 4004_B0C8h
PORTD_DFWR is 4004_C000h base + C8h offset = 4004_C0C8h
PORTE_DFWR is 4004_D000h base + C8h offset = 4004_D0C8h
29
29
0
0
28
28
0
0
This read-only field is reserved and always has the value zero.
Clock Source
The digital filter configuration is valid in all digital pin muxing modes. Configures the clock source for the
digital input filters. Changing the filter clock source should only be done after disabling all enabled digital
filters.
0
1
27
27
0
0
Digital Filters are clocked by the bus clock.
Digital Filters are clocked by the 1 kHz LPO clock.
26
26
0
0
25
25
0
0
24
24
0
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
23
23
0
0
22
22
0
0
PORTx_DFCR field descriptions
21
21
0
0
20
20
0
0
19
19
0
0
18
18
0
0
0
17
17
0
0
16
16
0
0
0
15
15
0
0
Description
14
14
0
0
13
13
0
0
Chapter 11 Port control and interrupts (PORT)
12
12
0
0
11
11
0
0
10
10
0
0
0
0
9
9
0
0
8
8
0
0
7
7
0
0
6
6
0
0
5
5
4
0
4
0
0
0
3
3
FILT
0
0
2
2
0
0
1
1
239
0
0
0
0

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