MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1353

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

The I
independently of whether the transmitter and receiver are synchronous or asynchronous.
Typically, these protocols are used in a periodic manner, where data transfers at regular
intervals, such as at the sampling rate of an external codec. Both modes use the concept
of a frame. The beginning of the frame is marked with a frame sync when programmed
with continuous clock. The RCCR[DC] or TCCR[DC] bits determine the length of the
frame, depending on whether data is being transmitted or received.
The number of words transferred per frame depends on the mode of the I
mode, one data word is transferred per frame. In network mode, the frame divides into
two to 32 time slots. In each time slot, one data word is optionally transferred.
Apart from the above basic modes of operation, I
require some specific programming.
In non-I
should be equal to the word length setting of the master. In I
programmed word length setting can be lesser than or equal to the word length setting of
the I
In slave modes, the I
bits) can be lesser than or equal to the frame length setting of the master (external codec).
See
46.2 I
Freescale Semiconductor, Inc.
• I
• AC97 mode
Detailed operating mode descriptions
2
2
2
S master (external codec).
S mode
S supports both normal and network modes, and these can be selected
• AC97 fixed mode
• AC97 variable mode
Signal
SRCK
2
S slave modes (external frame sync), the I
2
S signal descriptions
Serial receive clock. SRCK can be used as an input or output.
Description
2
• In asynchronous mode the receiver uses this clock signal and it is
• In synchronous mode, the STCK port is used instead for clocking in
S's programmed frame length setting (TCCR[DC] or RCCR[DC]
always continuous.
data.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Table 46-2. I
Table continues on the next page...
2
S signal descriptions
for more details on the above modes.
2
S supports the following modes which
2
S's programmed word length setting
Chapter 46 Integrated interchip sound (I2S)
2
S slave mode, the I
2
S. In normal
I/O
I/O
2
S's
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