MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 899

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

36.4.23 DMA
The channel generates a DMA transfer request according to DMA and CHnIE bits (see
the following table).
If DMA = 1, the CHnF bit is cleared either by channel DMA transfer done or reading
CnSC while CHnF is set and then writing a zero to CHnF bit according to CHnIE bit (see
the following table).
Freescale Semiconductor, Inc.
NOTE
- FTM channel n configuration: input capture mode - (DECAPEN = 0), (COMBINE = 0), and (MSnB:MSnA = 0:0)
- FTM counter configuration: (FTMEN = 1), (QUADEN = 0), (CAPTEST = 1), (CPWMS = 0), (CNTIN = 0x0000), and
DMA
0
0
1
1
FTM counter clock
write to MODE
CAPTEST bit
write to CNT
FTM counter
CHnF bit
CHnIE
0
1
0
1
CnV
0x1053
The channel DMA transfer request is not
generated.
The channel DMA transfer request is not
generated.
The channel DMA transfer request is not
generated.
The channel DMA transfer request is generated
if (CHnF = 1).
Channel DMA Transfer Request
(MOD = 0xFFFF)
Table 36-247. Channel DMA Transfer Request
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0x1054
Figure 36-243. Capture Test Mode
0x1055
set CAPTEST
0x0300
0x1056
write 0x78AC
The channel interrupt is not generated.
The channel interrupt is generated if (CHnF = 1).
The channel interrupt is not generated.
The channel interrupt is not generated.
Channel Interrupt
0x78AC
clear CAPTEST
0x78AD
Chapter 36 FlexTimer (FTM)
0x78AC
0x78AE0x78AF 0x78B0
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