MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 738

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

CMP Functional Description
If CR1[SE]=1, the filter takes samples of COUTA on each positive transition of the
sample input. The output state of the filter changes when CR0[FILTER_CNT]
consecutive samples all agree that the output value has changed.
32.8.4.2 Latency Issues
The FPR[FILT_PER] value (or SAMPLE period) should be set such that the sampling
period is just larger than the period of the expected noise. This way a noise spike will
only corrupt one sample. The CR0[FILTER_CNT] value should be chosen to reduce the
probability of noisy samples causing an incorrect transition to be recognized. The
probability of an incorrect transition is defined as the probability of an incorrect sample
raised to the CR0[FILTER_CNT] power.
The following table summarizes maximum latency values for the various modes of
operation in the absence of noise. Filtering latency is restarted each time an actual output
transition is masked by noise.
The values of FPR[FILT_PER] (or SAMPLE period) and CR0[FILTER_CNT] must also
be traded off against the desire for minimal latency in recognizing actual comparator
output transitions. The probability of detecting an actual output change within the
nominal latency is the probability of a correct sample raised to the CR0[FILTER_CNT]
power.
738
Mode #
2A
2B
3A
3B
4A
4B
5A
5B
1
6
CR1[
EN]
0
1
1
1
1
1
1
1
1
1
CR1[
WE]
Table 32-30. Comparator Sample/Filter Maximum Latencies
X
0
0
0
0
0
0
1
1
1
CR1[
SE]
X
0
0
1
0
1
0
0
0
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
CR0[FILTER
> 0x01
> 0x01
_CNT]
0x00
0x01
0x01
0x00
0x01
X
X
X
Table continues on the next page...
FPR[FILT_P
0x01 - 0xFF
> 0x00
> 0x00
0x00
0x00
ER]
X
X
X
X
X
Sampled, Non-Filtered mode
Sampled, Filtered mode
Windowed / Resampled
Continuous Mode
Windowed mode
Operation
Disabled
mode
Freescale Semiconductor, Inc.
T
T
PD
PD
T
FPR[FILT_PER] x T
T
PD
PD
T
Maximum Latency
+ (CR0[FILTER_CNT] x
+ (CR0[FILTER_CNT] x
PD
+ (FPR[FILT_PER] x
+ (FPR[FILT_PER] x
T
SAMPLE
+ T
T
T
T
T
per
per
PD
PD
SAMPLE
) + 2T
N/A
T
T
) + T
+ T
+ T
PD
per
) + T
per
per
per
per
+ T
per
per
per
1
) +