MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1131

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

43.3.6 I2C Control Register 2 (I2Cx_C2)
Addresses: I2C0_C2 is 4006_6000h base + 5h offset = 4006_6005h
Freescale Semiconductor, Inc.
AD[10:8]
GCAEN
ADEXT
HDRS
RMEN
SBRC
Reset
Field
Read
2–0
Write
7
6
5
4
3
Bit
I2C1_C2 is 4006_7000h base + 5h offset = 4006_7005h
GCAEN
General call address enable
Enables general call address.
0
1
Address extension
Controls the number of bits used for the slave address.
0
1
High drive select
Controls the drive capability of the I2C pads.
0
1
Slave baud rate control
Enables independent slave mode baud rate at max frequency. This forces clock stretching on SCL in very
fast I2C modes.
0
1
Range address matching enable
This bit controls slave address matching for addresses between the values of the A1 and RA registers.
When this bit is set, a slave address match occurs for any address greater than the value of the A1
register and less than or equal to the value of the RA register.
0
1
Slave address
Contains the upper three bits of the slave address in the 10-bit address scheme. This field is valid only
when the ADEXT bit is set.
7
0
Disabled
Enabled
7-bit address scheme
10-bit address scheme
Normal drive mode
High drive mode
The slave baud rate follows the master baud rate and clock stretching may occur
Slave baud rate is independent of the master baud rate
Range mode disabled. No address match occurs for an address within the range of values of the A1
and RA registers.
Range mode enabled. Address matching occurs when a slave receives an address within the range
of values of the A1 and RA registers.
ADEXT
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
6
I2Cx_C2 field descriptions
HDRS
0
5
SBRC
0
4
Description
RMEN
0
3
Chapter 43 Inter-Integrated Circuit (I2C)
0
2
AD[10:8]
0
1
0
0
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