MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 499

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Freescale Semiconductor, Inc.
ALLOWUPDATE
STNDBYEN
IRQRSTEN
WDOGEN
Reserved
STOPEN
CLKSRC
WAITEN
DBGEN
WINEN
Field
9
8
7
6
5
4
3
2
1
0
This read-only field is reserved and always has the value zero.
Enables or disables WDOG in Standby mode.
0
1
Enables or disables WDOG in wait mode.
0
1
Enables or disables WDOG in stop mode.
0
1
Enables or disables WDOG in Debug mode.
0
1
Enables updates to watchdog write once registers, after initial configuration window (WCT) closes,
through unlock sequence.
0
1
Enable windowing mode.
0
1
Used to enable the debug breadcrumbs feature. A change in this bit is updated immediately, as opposed
to updating after WCT.
0
1
Selects clock source for the WDOG timer and other internal timing operations.
0
1
Enables or disables the WDOG’s operation. In the disabled state, the watchdog timer is kept in the reset
state, but the other exception conditions can still trigger a reset/interrupt. A change in the value of this bit
must be held for more than one WDOG_CLK cycle for the WDOG to be enabled or disabled.
0
1
WDOG is disabled in system Standby mode.
WDOG is enabled in system Standby mode.
WDOG is disabled in CPU wait mode.
WDOG is enabled in CPU wait mode.
WDOG is disabled in CPU stop mode.
WDOG is enabled in CPU stop mode.
WDOG is disabled in CPU Debug mode.
WDOG is enabled in CPU Debug mode.
No further updates allowed to WDOG write once registers.
WDOG write once registers can be unlocked for updating.
Windowing mode is disabled.
Windowing mode is enabled.
WDOG time-out generates reset only.
WDOG time-out initially generates an interrupt. After WCT time, it generates a reset.
Dedicated clock source selected as WDOG clock (LPO Oscillator).
WDOG clock sourced from alternate clock source.
WDOG is disabled.
WDOG is enabled.
WDOG_STCTRLH field descriptions (continued)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Description
Chapter 23 Watchdog Timer (WDOG)
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