MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1537

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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50.4.4.4 SAMPLE instruction
The SAMPLE instruction obtains a sample of the system data and control signals present
at the MCU input pins and just before the boundary scan register cells at the output pins.
This sampling occurs on the rising edge of TCK in the Capture-DR state when the
SAMPLE instruction is active. The sampled data is viewed by shifting it through the
boundary scan register to the TDO output during the Shift-DR state. There is no defined
action in the Update-DR state. Both the data capture and the shift operation are
transparent to system operation.
50.4.4.5 EXTEST External test instruction
EXTEST selects the boundary scan register as the shift path between TDI and TDO. It
allows testing of off-chip circuitry and board-level interconnections by driving preloaded
data contained in the boundary scan register onto the system output pins. Typically, the
preloaded data is loaded into the boundary scan register using the SAMPLE/PRELOAD
instruction before the selection of EXTEST. EXTEST asserts the internal system reset for
the MCU to force a predictable internal state while performing external boundary scan
operations.
50.4.4.6 HIGHZ instruction
HIGHZ selects the bypass register as the shift path between TDI and TDO. While
HIGHZ is active all output drivers are placed in an inactive drive state (e.g., high
impedance). HIGHZ also asserts the internal system reset for the MCU to force a
predictable internal state.
50.4.4.7 CLAMP instruction
CLAMP allows the state of signals driven from MCU pins to be determined from the
boundary scan register while the bypass register is selected as the serial path between
TDI and TDO. CLAMP enhances test efficiency by reducing the overall shift path to a
Freescale Semiconductor, Inc.
of the boundary scan register cells on the falling edge of TCK in the Update-DR
state. The data is applied to the external output pins by the EXTEST or CLAMP
instruction. System operation is not affected.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Chapter 50 JTAG Controller (JTAGC)
1537

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