MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 248

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory map and register definition
12.2.2 System Options Register 2 (SIM_SOPT2)
SOPT2 contains the controls for selecting many of the module clock source options on
this device. See the Clock Distribution chapter for more information including clocking
diagrams and definitions of device clocks.
Address: SIM_SOPT2 is 4004_7000h base + 1004h offset = 4004_8004h
248
Reset
Reset
SDHCSRC
Bit
Bit
W
W
Reserved
Reserved
R
R
I2SSRC
31–30
29–28
27–26
25–24
Field
31
15
0
0
0
30
14
0
0
0
This read-only field is reserved and always has the value zero.
SDHC clock source select
Selects the clock source for the SDHC clock.
00
01
10
11
This read-only field is reserved and always has the value zero.
I2S master clock source select
Selects the clock source for I
00
01
SDHCSRC
29
13
Core/system clock.
MCGPLLCLK/MCGFLLCLK clock
OSCERCLK clock
External bypass clock (SDHC0_CLKIN)
Core/system clock divided by the I
I2SDIV] descriptions.
MCGPLLCLK/MCGFLLCLK clock divided by the I
SIM_CLKDIV2[I2SFRAC, I2SDIV] descriptions.
0
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
28
12
0
1
27
11
0
0
SIM_SOPT2 field descriptions
0
Table continues on the next page...
26
10
0
0
0
2
S master clock.
25
0
0
9
I2SSRC
0
2
S fractional clock divider. See the SIM_CLKDIV2[I2SFRAC,
24
0
0
8
Description
23
0
0
7
0
2
S fractional clock divider. See the
22
0
0
6
21
0
0
5
0
20
0
0
0
4
Freescale Semiconductor, Inc.
19
0
0
0
3
18
0
0
0
2
17
0
0
0
1
16
0
0
0