MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 232

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory map and register definition
232
4004_C03C
4004_C04C
4004_C05C
4004_C06C
4004_C07C
4004_C0A0
4004_C0C0
4004_C0C4
4004_C0C8
4004_D00C
4004_C030
4004_C034
4004_C038
4004_C040
4004_C044
4004_C048
4004_C050
4004_C054
4004_C058
4004_C060
4004_C064
4004_C068
4004_C070
4004_C074
4004_C078
4004_C080
4004_C084
4004_D000
4004_D004
4004_D008
Absolute
address
(hex)
Pin Control Register n (PORTD_PCR12)
Pin Control Register n (PORTD_PCR13)
Pin Control Register n (PORTD_PCR14)
Pin Control Register n (PORTD_PCR15)
Pin Control Register n (PORTD_PCR16)
Pin Control Register n (PORTD_PCR17)
Pin Control Register n (PORTD_PCR18)
Pin Control Register n (PORTD_PCR19)
Pin Control Register n (PORTD_PCR20)
Pin Control Register n (PORTD_PCR21)
Pin Control Register n (PORTD_PCR22)
Pin Control Register n (PORTD_PCR23)
Pin Control Register n (PORTD_PCR24)
Pin Control Register n (PORTD_PCR25)
Pin Control Register n (PORTD_PCR26)
Pin Control Register n (PORTD_PCR27)
Pin Control Register n (PORTD_PCR28)
Pin Control Register n (PORTD_PCR29)
Pin Control Register n (PORTD_PCR30)
Pin Control Register n (PORTD_PCR31)
Global Pin Control Low Register (PORTD_GPCLR)
Global Pin Control High Register (PORTD_GPCHR)
Interrupt Status Flag Register (PORTD_ISFR)
Digital Filter Enable Register (PORTD_DFER)
Digital Filter Clock Register (PORTD_DFCR)
Digital Filter Width Register (PORTD_DFWR)
Pin Control Register n (PORTE_PCR0)
Pin Control Register n (PORTE_PCR1)
Pin Control Register n (PORTE_PCR2)
Pin Control Register n (PORTE_PCR3)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
Register name
PORT memory map (continued)
Table continues on the next page...
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
(always
(always
reads
reads
zero)
zero)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
W
W
Freescale Semiconductor, Inc.
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
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