MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 431

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

21.3.10 Set START Bit Register (DMA_SSRT)
The SSRT provides a simple memory-mapped mechanism to set the START bit in the
TCD of the given channel. The data value on a register write causes the START bit in the
corresponding transfer control descriptor to be set. Setting the SAST bit provides a global
set function, forcing all START bits to be set. If the NOP bit is set, the command is
ignored. This allows you to write multiple-byte registers as a 32-bit word. Reads of this
register return all zeroes.
Address: DMA_SSRT is 4000_8000h base + 1Dh offset = 4000_801Dh
Freescale Semiconductor, Inc.
Reserved
SAST
SSRT
NOP
Reset
Field
Read
5–4
3–0
Write
7
6
Bit
NOP
0
1
Set All START Bits (activates all channels)
0
1
This field is reserved.
Set START Bit
Sets the corresponding bit in TCDn_CSR[START]
7
0
0
Normal operation
No operation, ignore the other bits in this register
Set only the TCDn_CSR[START] bit specified in the SSRT field
Set all bits in TCDn_CSR[START]
SAST
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
0
6
DMA_SSRT field descriptions
0
5
0
0
4
Description
Chapter 21 Direct Memory Access Controller (eDMA)
0
3
0
2
SSRT
0
0
1
0
0
431