MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 64

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Core modules
3.2.2 Nested Vectored Interrupt Controller (NVIC) Configuration
This section summarizes how the module has been configured in the chip. Full
documentation for this module is provided by ARM and can be found at
www.arm.com.
3.2.2.1 Interrupt priority levels
This device supports 16 priority levels for interrupts. Therefore, in the NVIC each source
in the IPR registers contains 4 bits. For example, IPR0 is shown below:
3.2.2.2 Non-maskable interrupt
The non-maskable interrupt request to the NVIC is controlled by the external NMI signal.
The pin the NMI signal is multiplexed on, must be configured for the NMI function to
generate the non-maskable interrupt request.
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W
R
Private Peripheral Bus
System memory map
Power management
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Full description
Clocking
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IRQ3
(PPB)
Topic
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0
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0
ARM Cortex-M4 core
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Table 3-2. Reference links to related information
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Interrupt Controller
Nested Vectored
Related module
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0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
(NVIC)
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IRQ2
PPB
Figure 3-2. NVIC configuration
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Interrupt Controller
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Nested Vectored
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(NVIC)
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IRQ1
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Interrupts
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System memory map
ARM Cortex-M4 core
Power management
http://www.arm.com
Clock distribution
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Reference
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Module
Module
Module
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Freescale Semiconductor, Inc.
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IRQ0
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http://
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1
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