MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 128

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

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Part Number:
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Communication interfaces
The FlexCAN module can be configured to generate a wakeup interrupt in STOP and
VLPS modes. When the FlexCAN is configured to generate a wakeup, a recessive to
dominant transition on the CAN bus generates an interrupt.
3.9.1.6 FlexCAN Doze Mode
The Doze mode for the FlexCAN module is the same as the Wait and VLPW modes for
the chip.
3.9.2 SPI configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
3.9.2.1 SPI Modules Configuration
This device contains two SPI modules.
128
System memory map
Signal Multiplexing
Full description
Clocking
Topic
Table 3-60. Reference links to related information
Related module
Port control
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
SPI
Figure 3-47. SPI configuration
Peripheral
bridge
SPI
Register
access
System memory map
Signal Multiplexing
Clock Distribution
Module signals
Reference
SPI
Freescale Semiconductor, Inc.

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