MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 1293

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Reset
45.4.24 Host Controller Version (SDHC_HOSTVER)
This register contains the vendor host controller version information. All bits are read
only and will read the same as the power-reset value.
Address: SDHC_HOSTVER is 400B_1000h base + FCh offset = 400B_10FCh
Freescale Semiconductor, Inc.
Bit
W
R
Reserved
31
0
31–16
15–8
Field
Field
VVN
SVN
7–0
30
0
29
0
28
0
0011b
0100b
0101b
0110b
0111b
...
1110b
1111b
This read-only field is reserved and always has the value zero.
Vendor Version Number
These status bits are reserved for the vendor version number. The host driver shall not use this status.
00h
10h
11h
12h
All others Reserved
Specification Version Number
These status bits indicate the host controller specification version.
01h
All others Reserved
27
0
26
0
25
0
SDHC_MMCBOOT field descriptions (continued)
SDCLK x 2^11
SDCLK x 2^12
SDCLK x 2^13
SDCLK x 2^14
SDCLK x 2^15
SDCLK x 2^22
Reserved
24
Freescale SDHC version 1.0
Freescale SDHC version 2.0
Freescale SDHC version 2.1
Freescale SDHC version 2.2
SD host specification version 2.0, supports test event register and ADMA.
0
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
23
0
SDHC_HOSTVER field descriptions
22
0
21
0
20
0
19
0
18
0
17
0
16
0
15
0
Description
Description
14
0
Chapter 45 Secured digital host controller (SDHC)
13
0
12
1
VVN
11
0
10
0
1
9
0
8
0
7
0
6
0
5
4
0
SVN
0
3
0
2
0
1
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1
0