MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 816

• Manufacturer Part Number: MK30DN512ZVLK10
• Description: ARM Microcontrollers - MCU KINETIS 512K SLCD
• Manufacturer: Freescale Semiconductor

Specifications of MK30DN512ZVLK10

• Core: ARM Cortex M4
• Processor Series: K30
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT

Memory Map and Register Definition
816
DECAPEN3
COMBINE3
SYNCEN3
DECAP3
COMP3
DTEN3
Field
29
28
27
26
25
24
Synchronization Enable for n = 6
Enables PWM synchronization of registers C(n)V and C(n+1)V.
0
1
Deadtime Enable for n = 6
Enables the deadtime insertion in the channels (n) and (n+1).
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0
1
Dual Edge Capture Mode Captures for n = 6
Enables the capture of the FTM counter value according to the channel (n) input event and the
configuration of the dual edge capture bits.
This field applies only when FTMEN = 1 and DECAPEN = 1.
DECAP bit is cleared automatically by hardware if dual edge capture – one-shot mode is selected and
when the capture of channel (n+1) event is made.
0
1
Dual Edge Capture Mode Enable for n = 6
Enables the dual edge capture mode in the channels (n) and (n+1). This bit reconfigures the function of
MSnA, ELSnB:ELSnA and ELS(n+1)B:ELS(n+1)A bits in dual edge capture mode according to
36-7.
This field applies only when FTMEN = 1.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0
1
Complement of Channel (n) for n = 6
Enables complementary mode for the combined channels. In complementary mode the channel (n+1)
output is the inverse of the channel (n) output.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0
1
Combine Channels for n = 6
Enables the combine feature for channels (n) and (n+1).
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0
1
The PWM synchronization in this pair of channels is disabled.
The PWM synchronization in this pair of channels is enabled.
The deadtime insertion in this pair of channels is disabled.
The deadtime insertion in this pair of channels is enabled.
The dual edge captures are inactive.
The dual edge captures are active.
The dual edge capture mode in this pair of channels is disabled.
The dual edge capture mode in this pair of channels is enabled.
The channel (n+1) output is the same as the channel (n) output.
The channel (n+1) output is the complement of the channel (n) output.
Channels (n) and (n+1) are independent.
Channels (n) and (n+1) are combined.
FTMx_COMBINE field descriptions (continued)
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
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Description
Freescale Semiconductor, Inc.
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