MK30DN512ZVLK10 Freescale Semiconductor, MK30DN512ZVLK10 Datasheet - Page 517

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MK30DN512ZVLK10

Manufacturer Part Number
MK30DN512ZVLK10
Description
ARM Microcontrollers - MCU KINETIS 512K SLCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLK10

Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-80
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLK10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
24.3.4 MCG Control 4 Register (MCG_C4)
Reset values for DRST and DMX32 bits are 0.
Address: MCG_C4 is 4006_4000h base + 3h offset = 4006_4003h
* Notes:
Freescale Semiconductor, Inc.
A value for FCTRIM is loaded during reset from a factory programmed location . x = Undefined at reset.
DRST_DRS
x = Undefined at reset.
DMX32
Reset
Field
Read
6–5
Write
7
Bit
DMX32
DCO Maximum Frequency with 32.768 kHz Reference
The DMX32 bit controls whether or not the DCO frequency range is narrowed to its maximum frequency
with a 32.768 kHz reference.
The following table identifies settings for the DCO frequency range.
NOTE: The system clocks derived from this source should not exceed their specified maximums.
0
1
DCO Range Select
The DRS bits select the frequency range for the FLL output, DCOOUT. When the LP bit is set, writes to
the DRS bits are ignored. The DRST read field indicates the current frequency range for DCOOUT. The
DRST field does not update immediately after a write to the DRS field due to internal synchronization
between clock domains. Refer to DCO Frequency Range table for more details.
00
01
7
0
DRST_DRS
00
01
10
11
DCO has a default range of 25%.
DCO is fine-tuned for maximum frequency with 32.768 kHz reference.
Encoding 0 — Low range (reset default).
Encoding 1 — Mid range.
K30 Sub-Family Reference Manual, Rev. 6, Nov 2011
0
6
DRST_DRS
DMX32
0
1
0
1
0
1
0
1
MCG_C4 field descriptions
Table continues on the next page...
0
5
x*
4
Reference Range
31.25-39.0625 kHz 640
32.768 kHz
31.25-39.0625 kHz 1280
32.768 kHz
31.25-39.0625 kHz 1920
32.768 kHz
31.25-39.0625 kHz 2560
32.768 kHz
Description
Chapter 24 Multipurpose Clock Generator (MCG)
x*
3
FCTRIM
FLL Factor
732
1464
2197
2929
x*
2
x*
1
DCO Range
20-25 MHz
24 MHz
40-50 MHz
48 MHz
60-75 MHz
72 MHz
80-100 MHz
96 MHz
SCFTRIM
x*
0
517

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